Memory Speed - Revision history

Mkille at 21:23, 24 September 2013

2013-09-24T21:23:50Z

Dunstvangeet: /* DDR SDRAM (DDR1) SDRAM DIMMs */

2011-04-27T01:33:35Z

DDR SDRAM (DDR1) SDRAM DIMMs

Dunstvangeet: /* DDR SDRAM (DDR1) SDRAM DIMMs */

2011-04-27T00:48:34Z

DDR SDRAM (DDR1) SDRAM DIMMs

Dunstvangeet: /* DDR2 SDRAM DIMMs */

2011-04-27T00:47:55Z

DDR2 SDRAM DIMMs

Dunstvangeet: /* DDR3 SDRAM DIMMs */

2011-04-27T00:47:00Z

DDR3 SDRAM DIMMs

Dunstvangeet: New page: For various technologies, there are certain bus and device clock frequencies that are standardized. There is also a decided nomenlature for each of these speeds for each type. ==SDRAM== ...

2009-12-15T19:54:23Z

New page: For various technologies, there are certain bus and device clock frequencies that are standardized. There is also a decided nomenlature for each of these speeds for each type. ==SDRAM== ...

New page

For various technologies, there are certain bus and device clock frequencies that are standardized. There is also a decided nomenlature for each of these speeds for each type.

==SDRAM==
SDR SDRAM DIMMs - These first synchronous registered DRAM DIMMs had the same bus frequency for data, address and control lines.
*PC66 = 66 MHz
*PC100 = 100 MHz
*PC133 = 133 MHz

==DDR SDRAM (DDR1) SDRAM DIMMs==
DIMMs based on Double Daqta Rate (DDR) DRAM have data but not the strobe at doubt the rate of the clock. THis is achieved by clocking on both the rising and falling edge of the data strobes.
*PC1600 = 200 MHz data & Strobe / 100 MHz clock for address and control.
*PC2100 = 266 MHz data & Strobe / 133 MHz clock for address and control.
*PC2700 = 333 MHz data & Strobe / 166 MHz clock for address and control.
*PC3200 = 400 MHz data & Strobe / 200 MHz clock for address and control.

==DDR2 SDRAM DIMMs==
DIMMs based on Doube Data Rate 2 (DDR2) DRAM also have data and data strobe frequencies at double the rate of the clock. This is achieved by clocking on both the rising and falling edge of the data strobes. The power consumption and voltage of DDR2 is significantly lower than DDR1 at the same speed.
*PC2-3200 = 400 MHz data & Strobe / 200 MHz clock for address and control.
*PC2-4200 = 533 MHz data & Strobe / 266 MHz clock for address and control.
*PC2-5300 = 667 MHz data & Strobe / 333 MHz clock for address and control.
*PC2-6400 = 800 MHz data & Strobe / 400 MHz clock for address and control.
*PC2-8000 = 1000 MHz data & Strobe / 500 MHz clock for address and control.
*PC2-8500 = 1066 MHz data & Strobe / 533 MHz clock for address and control.
*PC2-9600 = 1200 MHz data & Strobe / 600 MHz clock for address and control.

==DDR3 SDRAM DIMMs==
DIMMs based on Doube Data Rate 3 (DDR3) DRAM also have data and data strobe frequencies at double the rate of the clock. This is achieved by clocking on both the rising and falling edge of the data strobes. The power consumption and voltage of DDR3 is significantly lower than DDR2 at the same speed.
*PC3-6400 = 800 MHz data & Strobe / 400 MHz clock for address and control.
*PC3-8000 = 1000 MHz data & Strobe / 500 MHz clock for address and control.
*PC3-10600 = 1333 MHz data & Strobe / 667 MHz clock for address and control.
*PC3-12800 = 1600 MHz data & Strobe / 800 MHz clock for address and control.
*PC3-16000 = 2000 MHz data & Strobe / 1000 MHz clock for address and control.

← Older revision		Revision as of 21:23, 24 September 2013
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	For various technologies, there are certain bus and device clock frequencies that are standardized. There is also a decided nomenlature for each of these speeds for each type.		For various technologies, there are certain bus and device clock frequencies that are standardized. There is also a decided nomenlature for each of these speeds for each type.

@@ Line 8: / Line 8: @@
 ==DDR SDRAM (DDR1) SDRAM DIMMs==
-DIMMs based on Double Daqta Rate (DDR) DRAM have data but not the strobe at doubt the rate of the clock.  THis is achieved by clocking on both the rising and falling edge of the data strobes.
+DIMMs based on Double Data Rate (DDR) DRAM have data but not the strobe at double the rate of the clock.  This is achieved by clocking on both the rising and falling edge of the data strobes.
 *PC1600 = 200 MHz
 *PC2100 = 266 MHz

@@ Line 9: / Line 9: @@
 ==DDR SDRAM (DDR1) SDRAM DIMMs==
 DIMMs based on Double Daqta Rate (DDR) DRAM have data but not the strobe at doubt the rate of the clock.  THis is achieved by clocking on both the rising and falling edge of the data strobes.
-*PC1600 = 200 MHz data & Strobe / 100 MHz clock for address and control.
+*PC1600 = 200 MHz
-*PC2100 = 266 MHz data & Strobe / 133 MHz clock for address and control.
+*PC2100 = 266 MHz
-*PC2700 = 333 MHz data & Strobe / 166 MHz clock for address and control.
+*PC2700 = 333 MHz
-*PC3200 = 400 MHz data & Strobe / 200 MHz clock for address and control.
+*PC3200 = 400 MHz
 ==DDR2 SDRAM DIMMs==

@@ Line 16: / Line 16: @@
 ==DDR2 SDRAM DIMMs==
 DIMMs based on Doube Data Rate 2 (DDR2) DRAM also have data and data strobe frequencies at double the rate of the clock.  This is achieved by clocking on both the rising and falling edge of the data strobes.  The power consumption and voltage of DDR2 is significantly lower than DDR1 at the same speed.
-*PC2-3200 = 400 MHz data & Strobe / 200 MHz clock for address and control.
+*PC2-3200 = 400 MHz
-*PC2-4200 = 533 MHz data & Strobe / 266 MHz clock for address and control.
+*PC2-4200 = 533 MHz
-*PC2-5300 = 667 MHz data & Strobe / 333 MHz clock for address and control.
+*PC2-5300 = 667 MHz
-*PC2-6400 = 800 MHz data & Strobe / 400 MHz clock for address and control.
+*PC2-6400 = 800 MHz
-*PC2-8000 = 1000 MHz data & Strobe / 500 MHz clock for address and control.
+*PC2-8000 = 1000 MHz
-*PC2-8500 = 1066 MHz data & Strobe / 533 MHz clock for address and control.
+*PC2-8500 = 1066 MHz
-*PC2-9600 = 1200 MHz data & Strobe / 600 MHz clock for address and control.
+*PC2-9600 = 1200 MHz
 ==DDR3 SDRAM DIMMs==

@@ Line 25: / Line 25: @@
 ==DDR3 SDRAM DIMMs==
-DIMMs based on Doube Data Rate 3 (DDR3) DRAM also have data and data strobe frequencies at double the rate of the clock.  This is achieved by clocking on both the rising and falling edge of the data strobes.  The power consumption and voltage of DDR3 is significantly lower than DDR2 at the same speed.
+DIMMs based on Double Data Rate 3 (DDR3) DRAM also have data and data strobe frequencies at double the rate of the clock.  This is achieved by clocking on both the rising and falling edge of the data strobes.  The power consumption and voltage of DDR3 is significantly lower than DDR2 at the same speed.
-*PC3-6400 = 800 MHz data & Strobe / 400 MHz clock for address and control.
+*PC3-6400 = 800 MHz
-*PC3-8000 = 1000 MHz data & Strobe / 500 MHz clock for address and control.
+*PC3-8000 = 1000 MHz
-*PC3-10600 = 1333 MHz data & Strobe / 667 MHz clock for address and control.
+*PC3-10600 = 1333 MHz
-*PC3-12800 = 1600 MHz data & Strobe / 800 MHz clock for address and control.
+*PC3-12800 = 1600 MHz
-*PC3-16000 = 2000 MHz data & Strobe / 1000 MHz clock for address and control.
+*PC3-14900 = 1866⅔ MHz